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Home IP Portfolio Vivante® ISP IP Vivante ISP8000Pico
Ultra-low power image signal processing for AIoT and wearable markets

The ISP8000Pico offers smaller silicon footprint with ultra-low power image processing as well as pixel processing and conversion to produce output data in low power applications. It supports up to 1080p camera sensor through the industry standard DVP interface. VeriSilicon's Vivante ISP8000Pico can perform frame rate and resolution control and produces useful output formats including RGB, YUV, RAW and Monochrome, which can be directly consumed by downstream IP blocks. Overall system power is kept at the minimum level during operations, and thus is. suitable for an always-on power domain designed to produce continuous output and the lowest power. ISP8000Pico has the industry-leading PPA (Performance, Power, Area) in its class and is targeted for wearable, AIoT and any battery-powered devices.

ISP Base Features
Supports DVP Input Interface
Input color formats: 8-bit, 10-bit, 12-bit Bayer; 8-bit, 10-bit YUV BT.601, BT.656; 8-bit, 10-bit monochrome
SW Register Configuration: 32-bit AHB Slave
Frame rate control, configurable output FPS range from 60fps to 1fps
Format conversion: drop chroma components or reduce bit depth
Crop: configurable ROI window size and offset
Binning with configurable step size
BLS: black level subtraction
Dgain: digital gain
Demosic: Bayer to RGB
Gamma correction
CSM: color space matrix, RGB to YUV
Scale: drop pixels by down sampling ratio
YUV422 to YUV444: converts YUV422 to YUV444 format
YUV444 to RGB: converts YUV444 to RGB format
AE (Auto Exposure) and AWB (Auto White Balance) support
Low Power Design: Clock gating design for non-active blocks; Asynchronous clock domains with minimum working clock for ISP pipeline
Supported Output Color Formats
8-bit monochrome
RAW 8/10/12-bit with raster scan
YUV output support
Y-Only (Luma-Only) output support (without outputting U and V data)
RGB888 planar support

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芯原股份 (688521.SH)
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