VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon) provides platform based, comprehensive, one-stop silicon custom service and semiconductor IP authorization service leveraging up its own semiconductor IPs.
Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has over 1,300 employees worldwide work together to design and deliver market leading silicon products and superior services to make us the preferred partner for our global customers.
We challenge all of our employees to play an integral role in our ongoing success, and in return, we are committed to offering rewarding opportunities, a progressive culture and an attractive total benefits package.
Please send your resume to our Human Resources Department.
| For China: | hr@verisilicon.com |
| For Overseas: | hr.us@verisilicon.com |
| VeriSilicon starts annual campus recruitment in each September. We arrange campus events in the universities in East China, Central China, and West China for students pursuing a Bachelor’s, Master’s or Doctor’s degree in Electronics, Computer science, and Automation related majors. Welcome to join us ! | |
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| Campus Recruiting Schedule | Welcome to pay attention to the WeChat Official Account to get more information |
| Please scan the QR code below to get the campus recruiting schedule. | |
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Sr. Director of Sales
This is a senior-level, position within the North America Sales Team that will focus on developing new businesses and manage existing business at both and OEM system and semiconductors companies in the North America market.
Qualified candidates must possess a strong ability to develop and build business engagements, comprehend and convey technical customer product requirements, have excellent customer management skills, and proven experience in negotiating and closing major business opportunities.
Candidates must effective and comfortable working across multi-national team environments.
Ideally 10 - 15 years of experience in Silicon IP and SoC Design Services.
10 years of direct sales and business development experience.
Proven experience forecasting and achieving quarterly revenue goals
Ability in structuring, negotiating and closing contracts for IP and Design Services business
Excellent communication and interpersonal relationship skills
Self-motivated and results-driven
Creative business thinking
Experienced and knowledgeable of end-to-end chip SoC development methods is a strong plus
Experience in managing hardware development teams or projects is a strong plus
Experience with consumer, industrial, or automotive programs a strong plus.
Software Engineer
Develop tests, plans, and tools to analyze, simulate, validate, and verify functional or performance models.
Develop Architecture Modeling tool.
Work on processor performance modeling, design system C model development to validate the architecture.
Participate in developing software for various hardware simulators and test infrastructures.
Design new software and hardware features for graphics and parallel processing architectures.
Design novel algorithms to solve computer vision and machine learning problems
Analyze, profile, and optimize neural network training workloads on software and hardware simulator.
Develop detailed performance models and simulators for vision computing systems.
Degree: M.S. in Electrical Engineering, Computer Science/Engineering or related
Skills: C/C++, Python, Assembly Language, Verilog, MATLAB, LabVIEW, HSPICE
Machine Learning Engineer
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Develop architecture modeling tools for RTL design and design verification.
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Develop and validate test cases to verify accuracy and efficiency of modeling tools.
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Design novel algorithms to solve computer vision and machine learning problems.
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Work with engineer teams to realize the architecture of Artificial Intelligence IP, to ensure optimization of entire hardware/software stack and to maximize the efficiency and utility of AI solutions.
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Master of Science in Statistics, Mathematics, Computer Science or a related field.
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2 years of work experience in machine learning engineering or related.
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Proficiency in C, C++, Python. Familiar with DL frameworks (TensorFlow, PyTorch) and neural networks. Knowledge about NPU hardware.
Sr. Director of Sales
This is a senior-level, position within the North America Sales Team that will focus on developing new businesses and manage existing business at both and OEM system and semiconductors companies in the North America market.
Qualified candidates must possess a strong ability to develop and build business engagements, comprehend and convey technical customer product requirements, have excellent customer management skills, and proven experience in negotiating and closing major business opportunities.
Candidates must effective and comfortable working across multi-national team environments.
Ideally 10 - 15 years of experience in Silicon IP and SoC Design Services.
10 years of direct sales and business development experience.
Proven experience forecasting and achieving quarterly revenue goals
Ability in structuring, negotiating and closing contracts for IP and Design Services business
Excellent communication and interpersonal relationship skills
Self-motivated and results-driven
Creative business thinking
Experienced and knowledgeable of end-to-end chip SoC development methods is a strong plus
Experience in managing hardware development teams or projects is a strong plus
Experience with consumer, industrial, or automotive programs a strong plus.
Design Engineer(1)
Processor core and subsystem microarchitecture and design.
Actively participate in design, architecture and verification reviews.
RTL design and synthesis to analyze & optimize power, speed and area of physical implementation.
Define, maintain and enhance Block level verification environments using latest flows.
Develop and support reusable design and verification infrastructure using scripting tools.
Write technical design documents.
Strong understanding of processor architectures, instruction set including DSPs, ASIC/SOC/FPGA design and verification flow including RTL design, verification, logic synthesis and timing analysis.
Familiarity or experience with cache memory systems, bus interfaces, and peripherals like DMA, I2S, SPI, PDM.
Knowledge or experience in Verilog, SytemVerilog, design compiler, scripting tools (python/perl), verification tools, physical design implementation flow with Synopsys tools.
Programming skills in C/C++/System C/Assembly.
Master’s degree or higher in Electrical Engineering.
Design Engineer(2)
Digital Signal Processor and subsystem microarchitecture and design.
Write technical design documents.
Participate in design, architecture and verification reviews.
Conduct RTL design and synthesis to analyze & optimize area, speed and power of physical implementation.
Perform coding in Verilog and SytemVerilog for RTL implementation.
Define, maintain and enhance Block level verification environments for design modules.
Develop and support reusable design and verification infrastructure using scripting tools like python/perl.
Perform automation of daily tasks using scripting tools like python/perl.
Document Daily Work flow with ASIC and FPGA design and verification flows.
Develop and validate test cases to verify accuracy and efficiency of modeling tools.
M.S. in Computer Engineering, Electrical Engineering or related field
Knowledge or experience in Verilog, SytemVerilog, design compiler, scripting tools (python/perl), verification tools and flows.
Knowledge or experience in processor architectures and cache memory systems.
Knowledge or experience in ASIC/SOC/FPGA design and verification flows.
Knowledge or experience in physical design implementation flow with Synopsys tools.
Programming skills in C/C++/System C/Assembly.
Application Engineer
Job Responsibilities:
To promote VeriSilicon products and services to customers in Japan and support customers in Japan to define specification and develop their systems through extensive hardware and software knowledge.
Education :
Bachelor's in computer engineering, electronics engineering, or related field.
To prepare and do presentations to customers and show demonstrations on VeriSilicon software development kit and/or demo-board under supervise by managements.
To draft development contract for customers and have approval from VeriSilicon legal team.
To document the meeting minutes, follow customer’s questions and respond to them.
To communicate with VeriSilicon related division and customers to satisfy customer’s needs.
5+ years experience as an application engineer for System-on-Chip.
Furthermore 5+ years experience to support customers define specification and HW and SW design for Consumer, Automotive or Industrial Systems.
Extensive Knowledge in semiconductor technology and software, such as C/C++, Java, Perl, Oven-VX/CL etc.
Read/Write/Speak skill of English, TOEIC scores should be 600+.
To live in Tokyo or Kanagawa pref,, Japan.
To have strong perseverance and motivation to support customers.
SoC Design Engineer
Independently work on the design of ASIC function blocks in terms of Design Spec, Architecture definition, block design, RTL coding, logic synthesis and timing analysis (STA).
Cooperation with verification engineer, finish verification job and responsible for design quality. Review verification plan, Simulation & Debug, cdc check.
As SoC owner, work closely with system engineers, physical implementation designers, and testing engineers to do functional verification, floorplan, timing optimization/closure and DFT& ATE testing consideration.
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Master/PhD degree in EE/CS related specialties,work experience and rank are not limited.
Mastery of EDA tools(Synopsys or Cadence, VCS, Xcelium, DC, PT etc.) and capability of solving technical issues as below is a must: Design specification, RTL coding and style critique, block design, chip-level integration; logic synthesize and timing analyze (STA);System C modeling, System Verilog based on UVM methodology.
Relevant digital design experiences (on FPGA or ASIC, including course projects).
Familiar with C/C++, perl, python etc.
Knowledge of computer architecture (ARM or RISC-V) & on chip bus AMBA/NOC is a plus.
Knowledge of Audio Video interfaces: MIPI/HDMI/DP/SPDIF/I2S etc. is a plus.
Knowledge of interfaces USB/PCIe/Ethernet/DDR/SD/eMMC/SPI/CAN etc. is a plus.
Knowledge of AI or Video Codec is a plus.
Self-motivated, team work, and good communication skills in Chinese and English.
GPU ASIC Design Engineer
Design top-of-the-line Graphics/Vision processors, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.
Work experience and rank are not limited.
Programming skills in Verilog HDL.
Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation).
Highly motivated and skillful at solving difficult technical problems.
Knowledge of computer graphics and low-power design techniques is a plus.
Experience of GPU design is a plus.
Experience of memory controller design or compression design is a plus.
AI/AR ASIC Design Engineer
Design top-of-the-line Vision process/Deep learning, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.
Work experience and rank are not limited.
Programming skills in Verilog HDL.
Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation).
Highly motivated and skillful at solving difficult technical problems.
Knowledge of computing and low-power design techniques is a plus.
Experience of Vision process design or OpenCL VX is a plus.
Experience of CNN and deep learning design is a plus.
Video IP Design Engineer
Play an important role in defining video IP spec and devising Video IP architecture.
Develop challenging modules including module spec definition, macro architecture design, RTL coding, C coding, simulation and synthesis.
Carry out IP level verification or IP blocks integration/implementation.
Support customers regarding Video IP application.
Bachelor degree or above in EE.
Work experience and rank are not limited.
Good knowledge of some of the following general IP: H.264, H.265, MPEG, JPEG, AVS, AVS+ decoder & encoder and so on.
Skilled in the field of digital circuit design, whole digital design flow and EDA tools.
Skilled in some of the following disciplines: RTL coding, C coding, Catapult C coding, simulation, synthesis/DFT/STA. Knowledge about catapult C design flow is a plus.
Key member in at least one mature silicon proven video IP.
Fluent in both English and Chinese.
Self motivated, good communication skill and team work spirit.
ISP ASIC Design Engineer
Design micro-architecture for image processing algorithms, spec definition, Block and top level RTL implementation, optimization and verification, Design flow and FPGA validation.
Work experience and rank are not limited, master degree and above with related major, programming skills in Verilog HDL.
Knowledge of Image or video processing.
Experience of ASIC design (including specification, micro-architecture, and RTL implementation).
Be familiar with design flow (Synthesis, Lint, CDC, DFT, and etc.).
Experience of Image processor design, such as 3D noise reduction, HDR, white balance, image enhancer will be a plus.
Highly motivated and skillful at solving difficult technical problems.
EU and Lego Design Engineer
Experience of top-of-the-line GPU/AI projects, including specification, architecture,micro-architecture and RTL design.
Work experience and rank are not limited.
Programming skills in Verilog HDL.
Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation) .
Highly motivated and skillful at solving difficult technical problems.
Strong debugging and testing skills.
Strong communication skills in both English and Chinese.
Knowledge of math unit and low-power design techniques is a plus.
Experience of Shader EU or AI EU design is a plus.
Memory Sub-system Architecture
Experience of top-of-the-line GPU/CPU projects, including specification, architecture, micro-architecture in cache, local memory and system memory.
5+ years hands-on design validation experience.
Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation) .
Highly motivated and skillful at solving difficult technical problems.
Strong debugging and testing skills.
Strong communication skills in both English and Chinese.
Knowledge of cache architecture and design techniques is a plus.
Knowledge of GPU or CPU local memory and system memory architecture is a plus.
Experience of GPU and CPU memory consistency is a plus.
Network-on-chip Architecture
Experience of top-of-the-line NOC projects, including specification, architecture, micro-architecture.
5+ years hands-on design validation experience.
Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation) .
Highly motivated and skillful at solving difficult technical problems.
Strong debugging and testing skills.
Strong communication skills in both English and Chinese.
Strong understanding and skill in AMBA protocol.
Knowledge of bus fabric techniques is a plus.
Knowledge of GPU or CPU NOC architecture is a plus.
Experience of GPU and CPU NIC design is a plus.
High Speed SerDes Digital Engineer
Design and implementation of high-speed SERDES IPs
Performing algorithm design, RTL coding, analog design modeling, design verification, synthesis, timing closure, emulation and debugging of chips
Working with rest of Analog design team for interface definitions.
Working with the verification team to enable integration into top level test environments and provide support via functional models
Collaborating with the product development team to get the product into high volume applications.
Master degree or above in electronic engineering or computer science.
Work experience and rank are not limited.
Hands-on experience with 10Gbps and above SerDes is a plus.
Very strong skills in Verilog RTL coding and simulation.
Strong skills in scripting (C, Perl, Skill, MATLAB) .
Self-motivated, good team work spirit and good communication skills.
Relevant experiences in high speed serdes IO design, Ethernet/PCIe/SATA/USB/MIPI is a plus.
Foundation IP Circuit Design Engineer
Design and develop deep sub-micron foundation IP circuits including standard cells, memory and customization cells for chip PPA optimization.
Guide layout designer, assist in layout optimization based on post-layout simulation results.
Characterize and generate design models supporting major EDA design flows including verilog, Synopsys liberty model etc.
Design test chip testing circuits for STD/MEM/IO libraries and assist in testing.
Minimum MS degree in EE or related majors,work experience and rank are not limited.
Knowledge and project experience on circuit design with strong background on device physics.
Familiar and hands-on experience in script language and behavior model, ie,Tcl, Perl, Verilog, etc. Experiences on Cadence/Synopsys/Mentor's EDA tools.
Self motivated, good communication and team work skills are a must.
IO Circuit Design Engineer
Design GPIO library and customization IO, provide instruction on layout.
Design ESD protection circuit for Analog/RF IP.
Provide ESD protection strategy/guideline, pad cell assignment and ESD review for whole chip.
ESD/Latchup test and Failure Analysis.
Have experience in IO & ESD design,work experience and rank are not limited.
M.S. in EE or equivalent.
Knowledge in device physics, process, and physical layout.
Deep understanding of IO ESD/Latchup protection.
Experience on timing model and IBIS model.
Experience on DDR/SD/eMMC/LVDS IO is preferred.
Self-motivated, good communication skills and team work spirit are a must.
SoC Verification Engineer
Independently work on the verification of ASIC function blocks in terms of Verification Plan, Build Test bench, Develop Test cases, Simulation & Debug.
Setup IP/chip level verification env, modeling.
RTL/Gate-level simulation/regression. Code/function coverage analysis and closure
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Master/PhD degree in EE/CS related specialties,work experience and rank are not limited.
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Familiar with design and verification languages (Verilog, SystemVerilog, SVA etc.).
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Relevant digital design experiences (on FPGA or ASIC, including course projects).
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Familiar with C/C++, perl, python etc.
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Knowledge of computer architecture (ARM or RISC-V) & on chip bus AMBA/NOC is a plus.
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Knowledge of Audio Video interfaces: MIPI/HDMI/DP/SPDIF/I2S etc. is a plus.
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Knowledge of interfaces USB/PCIe/Ethernet/DDR/SD/eMMC/SPI/CAN etc. is a plus.
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Knowledge of AI or Video Codec is a plus.
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Self-motivated, team work, and good communication skills in Chinese and English.
Video IP Verification Engineer
Understanding the expected functionality of designs.
Developing testing and regression plans.
Designing and developing verification environment.
Running RTL and gate-level simulations/regression.
Code/functional coverage development, analysis and closure.
Work experience and rank are not limited.
Knowledge in ASIC/FPGA design process and verification tools/env ( UVM/OVM…).
Familiar with design and verification languages (Verilog, System Verilog, SVA etc.).
Scripting and automation skills (tcl, perl, makefile etc) a plus.
Self motivated, good communication skill and team work spirit.
SoC FE Flow Engineer
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Capable of contributing to and working on the chip and sub-blocks in terms of synthesize, timing optimization and sign-off.
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Capable of contributing to and working on the chip and sub-blocks in terms of Design PPA.
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Capable of contributing to and working on the chip and sub-blocks in terms of SDC writing change and hand-off.
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Capable of contributing to and working on the chip and sub-blocks in terms of DFT coverage analysis.
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Design test logic, insert Scan chain, MBIST, Boundary Scan circuits, finish DFT patterns generation and simulation.
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Work closely with physical implementation engineers, to solve floorplan, timing analysis, optimization/closure.
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Master/PhD degree in EE/CS related specialties,work experience and rank are not limited.
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Course knowledge and project experience in the related areas.
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Programming skills in Verilog HDL and System Verilog.
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Familiar with EDA tool, Such as Synopsys VCS、Verdi, Cadence IUS, Mentor QuestaSim.
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Knowledge of SoC design techniques is a plus.
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Knowledge of physical implementation techniques is a plus.
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Knowledge of low-power design or DFT design techniques is a plus.
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Familiar with DDR, PCIE, USB, MIPI, etc high-speed interface techniques is a plus.
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Knowledge of FPGA timing constraints and timing closure background is a plus.
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Familiar with Linux OS, programming skills in Shell/Perl/Python/TCL scripts is a plus.
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Self motivated, team work, and good communication are a must.
DFT Engineer
Complete DFT logic design, including: memory BIST, memory BISR, scan insertion, boundary scan insertion, macro testing.
Complete DFT mode timing constraint, support DFT mode timing closure.
Support chip bring-up, complete test pattern debugging, yield improvement.
Provide technical support for customer/FAE/sales.
Master of EE or above,work experience and rank are not limited.
Study hard and work actively.
Have following single or multiple experiences: chip level testing, ASIC coding and simulation, design implementation from RTL to GDS.
Full of enterprise and the spirit of teamwork, good ability to communicate and express, fluent in Mandarin and English.
Back End Design Engineer
Responsible for SDC and UPF/CPF development and debug.
Focus on design floor planning, power planning, IO planning, placement & CTS and routing, handling timing and congestion issue during project implementation.
IP level and chip level physical verification and DFM rule checking.
Power analysis and IR drop/EM analysis for both static and dynamic.
Strong capability in timing analysis, and independently handle all timing issues from netlist/RTL to GDS process.
Responsible for timing signoff for all functional modes and concerns, and work closely with DFT engineer for scan modes timing closure.
Work closely with package team and IO team regarding IO placement to address IO ESD, SSO and chip power supplement concerns.
Communicate with customer as well as AE or sales.
Bachelor’s degree or above in EE,work experience and rank are not limited.
Skilled in csh/perl/tcl.
2+ years work experience in relevant areas is required for Senior Engineer position; Good knowledge in at least one of the following disciplines: high speed chip P&R skills, advance node chip P&R, hierarchical flow or low power P&R implementation, physical layout & verification.
Rich experience on timing/noise violation fixing and CTS tree synthesis.
Good understanding about entire development flow of IC design.
Good understanding about FE design, process, package, testing, etc.
Fluent in both English and Chinese.
Self motivated, good communication skill and team work spirit.
Electronic System Design Engineer
Research and design system/board level solution for new generation SoCs.
Partner with silicon team to provide design guideline for customers.
Board schematic design, component selection and BOM generation with cost optimization.
Co-work with PCB layout engineer to define PCB stack-up, optimize components placement and trace routing.
System/Board level hardware debug and verification, signal measurement.
Collaborate with Thermal engineer for the system thermal solutions.
Collaborate with EMC/RF engineer to solve EMI/RF issue.
Co-work with Software/Firmware team for SoC bring up.
BS/MS degree in EE or CS.
Work experience and rank are not limited.
System level high-speed signal design techniques of DDR/PCIe/USB/DP/eMMC etc.
Skill of using EDA tools like OrCad, Allegro, KiCAD etc.
Experience with system level compliance tests, including EMI, ESD, Safety etc.
Experience with PCB layout, PCBA fabrication, board level bring-up, debug, and verification.
Experience with Signal Integrity, Power Integrity.
Better to have experience of Computer motherboards, Notebook and Tablet system design.
FPGA Engineer
Porting ASIC to FPGA .
Generate/run/debug test cases on FPGA.
FPGA High-speed solution, including RTL coding, IP using, simulation, timing closure and bit file generation.
Work with SoC team and software team on FPGA debug.
Bachelor degree or above in EE, CS or Automation.
Work experience and rank are not limited.
More experience in FPGA IP using/debug, such as DCM/PLL, Memory, PCIe, DDR3/DDR4 interface etc.
Familiar with FPGA development and simulation process and xilinx tools, such as ISE/Vivado.
Fluent in both English and Chinese.
Good problem solving and design document skill.
Self motivated, good communication skill and team work spirit.
Test Engineer
Draw test plan for new product and discuss with designer about test feasibility.
Develop test program on various ATE platform for new product. Manage debug of test program and hardware and meet product release schedule.
Support production and optimize program for test time reduction when volume ramp up.
Support test chip development and characterization of VeriSilicon IPs.
Bachelor degreeor above in EE ,work experience and rank are not limited.
Familiar with V93k platform, RF/High Speed project development experience are preferred.
C/C++ programming skills.
Familiar with pattern conversion tool TDL/ Wave wizard.
Good spoken and written English skills.
Good communication skill and team work spirit.
Hardware Test Engineer
Be responsible for the DDR/PCIE etc compliance test.
Plan the validation hardware.
Bring up the validation board.
Validation board stress test.
Do the regression test for the FPGA platform and EVB.
BS or MS,1-2 years work experience for hardware bring up.
Good knowledge/experience in PCB design and hardware bring up.
Basic knowledge for PCIE/DDR etc is perfect.
Be Familiar with using the scope to take test.
Self motivated, good communication skill and team work spirit.
WiFi Software Development Engineer
WiFi protocol stack and application development on embedded system.
Customized wifi software stack and firmware for adapting to different applications.
Design wifi software framework, and document them.
Analyze log, find root cause and fix bugs in wifi connection.
Fine-tune wifi connection parameters based on different user case.
Major in Computer Science or Electronic Engineering or communication engineering, Master and above degrees are preferred.
Work experience and rank are not limited.
Experience in years of C/C++ programming.
Experience in embedded development. Understanding of RTOS.
Experience in wifi protocol stack and firmware.
Familiar with problem solving and debugging for low power mode.
Experience in wifi driver.
Experience in wifi wpa_supplicant or hostapd.
Excellent teamwork and able to interact effectively with various functional areas and other teams.
Good written and spoken English.
BLE Software Development Engineer
Bluetooth application and profile development on embedded system.
Design Bluetooth software API, framework, and document them.
Analyze log, find root cause and fix bugs in Bluetooth connection.
Fine-tune Bluetooth connection parameters based on different user case.
Major in Computer Science or Electronic Engineering, Master and above degrees are preferred;
Work experience and rank are not limited.
Experience in C/C++ programming.
Experience in embedded development. Understanding of RTOS.
Experience in developing Bluetooth product.
Experience in classic bluetooth .profiles（HFP/A2DP）or BLE profiles is desired.
Experience in Bluetooth core protocol development is desired.
Experience in BlueZ, Bluedroid development is desired.
Excellent teamwork and ability to interact effectively with various functional areas and other teams.
Good written and spoken English.
IoT Embedded Software Engineer
Develop IoT SDK which supports different hardware architectures, such as ARM, DSP and RISC-V etc..
Develop configurable framework to support different IoT applications.
Develop drivers and algorithm of BT/BLE, sensor, Audio, Power control, display, security and other modules.
Develop reference applications and features for customer requirements.
Develop algorithms based on the data collected from multiple sensors for health monitoring or wearable devices and optimize the algorithms based on different hardware platforms.
Provide IoT system solution based on the SDK to the customer and support customer development based on SDK.
Work experience and rank are not limited, strong knowledge of embedded system. System design experience is a plus.
Strong knowledge of at least one architecture: ARM, DSP, RISC-V.
Experience in at least one area of BT/BLE, Sensor, Audio, Power Control, Display and Security.
Experience of developing algorithms with/for multiple sensors such as accelerometer, ECG, PPG, Piezoelectronic sensors are preferred.
Familiar with at least one embedded system OS. FreeRTOS is a plus.
Strong C/C++ programming skills. Experience in Makefile/CMake is a plus. Experience in script development is a plus: Shell script or Python script.
Strong problem solving capability and rich debugging skills, experience of JTAG debugger, Oscilloscope, Logic analyzer, Protocol analyzer.
Good spoken or written English and good communication skills.
Familiar with Git/Gerrit/Jenkins is a plus.
Familiar with QEMU is a plus.
Take responsibility, excellent teamwork.
Video CODEC Software Engineer
Development of Linux devices or other OS based device drivers for video decoders lik H264, HEVC, VP8, VP9, AV1 etc. and their relevant middleware software.
Understanding and solving the problems relating to smooth streaming and audio/video synchronization.
Provide the documentation and data flow diagram relating for the software to be implemented.
Develop the testing cases for the device drivers and middleware software relating to video CODECs.
Candidates meeting multiple below criteria are preferred:
Work experience and rank are not limited.
Experience in C/C++ programming.
Have experience in Linux Device driver development.
Good understanding of high definition and ultra-high definition video streams and their coding formats.
Video-related experiences in coding and debugging of low-level device drivers, middleware and application layer for video CODECs.
Independently completed the design and development of modules or sub-modules of large software system.
Good spoken English and written English.
Audio Software Development Engineer
Audio software development based on ARM platform, including voice function, audio encode/decode codec and audio post-processing.
Voice and Audio function development based on DSP platform, DSP assembly programming and optimization.
Corresponding module software design, development and programming tasks according to the development progress and assignment.
Responsible for software platform related debugging, performance optimization, configuration, bugs fixing and etc works.
Able to write relevant technical documents according to R&D specifications and project processes.
Bachelor degree or above; Computer software, electronic engineering or other related majors,work experience and rank are not limited.
Have experience in C/C++.
Familiar with Linux Kernel and Linux driver development.
Engineers with Linux ALSA development experience preferred.
Engineers with experience in the various voice/speech function such as ANC, AEC or Beamforming preferred.
Experience in DSP assembly development or ARM NEON assembly development experience can be a bonus.
Strong sense of responsibility and a good teamwork spirit.
Able to write and communicate fluently in English.
Willing to accept the company's work arrangements, willing to accept challenging tasks. Strong wills to learn new knowledge and explore new expertise in different areas according to the company's product planning and project needs.
System Software Architect
Be part of the team for designing the drivers, middleware and whole software architecture for SoC based on Linux, Android, Chrome OS etc..
Research and design high efficiency communication mechanism between processes and threads for Linux, Android, Chrome OS based software.
Design high performance system software framework by working closely with SoC design team.
Study the high speed bus, interface, high end CPU, GPU and design the software architecture with the right communication data structure and protocol, device drivers.
Design the software architecture with data flow diagram, status machine, APIs provided.
Design the use cases, test cases for the software framework you designed.
Candidates must meet multiple below criteria:
Major in computer science, digital signal processing, electronic engineering etc..
6 or more years of C/C++ programming experience.
6 or more years of experience in application, middleware or driver development on Linux, Android systems.
6 or more years of experiences on designing software for audio, video, computer vision, Linux device drivers, inter-process communication, Android framework etc..
Familiar with Linux kernel, Linux device drivers, Android framework, Chrome OS etc..
Familiar with OpenCV, OpenCL, OpenVX APIs and frameworks etc..
Familiar with deep learning frame work like Caffe、TensorFlow、PyTorch etc.
Good understanding of widely used CNN and RNN networks in deep learning.
Good spoken English and written English.
Good teamwork and communication skills.
Graphic Driver Software Engineer
Understand chip graphic specification and provide driver design.
Provide robust, flexible and reusable graphic device driver, include coding, document and unit test case.
Troubleshoot system issues and provide bug fixing.
Keep improving system performance.
Bachelor degree or above,work experience and rank are not limited.
Strong C/C++ programming.
Familiar with Linux device driver development.
Good knowledge of computer graphic.
Strong troubleshooting and debug ability.
Good communication and cooperation with team.
Experience of DRM, OpenGLES, Vulkan or MS DirectX (better to have).
Knowledge of Git (better to have).
Deep Learning Software Engineer
Design and develop deep-learning software such as image recognition, voice recognition applications and relevant middleware on embedded Linux systems.
Deploy typical deep-learning networks to embedded systems, utilizing relevant hardware accelerators on the SoC to optimize the network performance.
Design the software with use cases, data flow diagram and other technical documents.
Develop test cases for your code and the drivers/middleware API your applications are based on.
Candidates meeting multiple below criteria are preferred:
Work experience and rank are not limited.
Experience in C/C++ programming.
Have experience in application, middleware or driver development on Linux systems.
Practical experience in deep-learning software development on embedded systems.
Good understanding of widely used CNN and RNN networks in deep learning.
Good spoken English and written English.
Good teamwork and communication skills.
Multimedia Framework Software Engineer
Multimedia framework design and development on SoC.
Build software framework, coding, and debug according to the product requirements specification and development process.
Write, organize and archive design documents as required.
Other job assigned by line managers or program managers.
Bachelor in Electronics or Computer Systems Engineering, Master and above preferred.
Work experience and rank are not limited.
Have experience in multimedia framework design is preferred.
Strong Linux based C/C++ programming skills.
Solid knowledge of multimedia, familiar with FFMPEG, GStreamer & OpenMax is a plus.
Good in writing documents for software structure.
Excellent teamwork and ability to interface effectively with various functional areas and other teams.
Good written and spoken English.
Security Software Engineer
Maintain ARM Trusted Firmware from ARM release and develop security features built on top of it.
Develop and maintain secure apps for different SDK.
Develop TEE-OS to enable featured secure app runtime.
Develop secure boot.
Provide robust, flexible and reusable software, include coding, document and unit test case.
Bachelor degree or above,work experience and rank are not limited.
Strong C/C++ programming.
Have experience on ARM Trust Zone technology especially for secure app development.
Familiar with ARM v8-A Architecture and TrustZone technology.
Familiar with cryptography, PKI, TEE or TPM.
Experience with OP-TEE or other commercial TEE OS. (better to have).
Knowledge of Git (better to have).
Linux Device Drivers Software Engineer
Understand system requirement and provide design solution.
Develop high quality Linux device driver for SoC, include coding, document, unit test case.
Troubleshoot and fix bugs to maintain robust Linux system.
Keep improving Linux device driver performance.
Work experience and rank are not limited.
Strong C/C++ programming.
Good understanding of Linux kernel architecture.
Familiar and device driver development.
Kernel debug skilling includes crash, memory issue, race condition.
Good communication and cooperation with team.
Understanding ARM core is preferred.
Knowledge of Git is preferred.
Embedded Software Engineer(SoC System Verification)
Responsible for soc prototype and system verification.
Develop bootrom, bootloader, OS, and peripheral interface drivers according to the requirement, design test cases for stress & robustness tests.
Take the responsibilities of fpga verification and asci validation, locate and debug possible bugs, co-work with R&D to resolve problems.
Responsible for chip performance fine tune, Electrical characteristics test.
Minimum master degree major in Electrical Engineering, Computer/Control Engineering or equivalent,work experience and rank are not limited.
Familiar with C/C++, Python, deep understanding of linux driver, kernel.
Some basic HW knowledge, familiar with one of arm, x86, risc-v cpu architecture.
Abilities of analysis and debug problems, cross team communication.
Self-motivated, willing to accept challenging job.
Good English ability, especially in technical reading and writing.
Have basic video/audio/AI related knowledge is better.
Vision Computing Software Engineer(driver)
Develop computer vision driver stack, including Open VX, Android NN etc.
Optimize driver architecture to improve performance.
Work with arch team for design, profiling and verification.
Work experience and rank are not limited.
Good C programming skill and produced production code.
Understand basic concepts in operation system and data structure/algorithm.
Worked on large software code bases.
Understand machine learning layer operations, vision algorithm and worked with hardware acceleration.
ISP Driver Engineer
The ideal candidate will be extremely passionate for ISP and Sensor driver design. He or she will be part of the talented ISP team to build up the high quality platform of VeriSilicon ISP products, and driving up the easy-using capability and performance of the ISP platform.
Develop driver for ISP products.
Develop and deliver drivers on Linux system/RTOS.
Validate functionality of ISP pipeline on FPGA.
Video for Linux(V4L2) develop for ISP/Camera system.
Co-work with algorithm/Cmdel team for image quality fine tune on FPGA/Silicon.
Co-work with customer to launch ISP integrated platform.
Bachelor or above degree in electronics engineering, computer science, image signal process related fields, work experience and rank are not limited.
Excellent C/C++ language and Linux, RTOS, OS-less, V4L2 understanding.
Familiar with ISP pipeline and image-forming principle of CMOS sensor in OmniVision,ONSEMI and SONY, understand sensor interface such as DVP, MIPI, LVDS and so on.
Knowledge on camera 3A algorithm (AE、AWB 、AF).
Experience with image quality evaluation and tuning.
Experience with CMOS sensor driver and bring up.
Understand IQ tradeoffs of different ISP blocks is a good plus.
Excellent interpersonal communication skills, good team spirit and adaptability.
Open minded and fast learning.
GPU Graphics Architecture Engineer
Design and analyze algorithms and features of GPU graphics, and develop corresponding CModel.
Verify function and performance of new algorithms and features based on CModel.
Co-work with RTL team, cross-verify CModel and RTL.
Master or PHD degree in CS, EE, or Math.
Work experience and rank are not limited.
Strong C/C++ programming skills, Perl/Python programming skills is a plus.
Excellent in mathematics or solid understanding of data structure and algorithm.
Solid knowledge of 3D graphics pipeline (such as D3D/OpenGL/Vulkan) is a good plus.
Strong background in computer architecture is a good plus.
Experience in game-engine is good plus.
Good written and spoken English.
Self motivated, team work, and good communication are a must.
AI Algorithm and cmodel Engineer
Implement C-Model for HW accelerated algorithm and functionality of AI .
Develop tests, test plans, and testing infrastructure for to verify new algorithm and functionality and their performance.
Co-work with RTL team, cross-validate model and RTL.
Master or PHD degree in Graphics, CS, EE, or Math, work experience and rank are not limited.
Strong C/C++ programming skill. Familiar with Windows Visual Studio programming, and Linux programming environment,System C programming skill is a plus.
Experience with Image Processing/memory/math hardware modeling, algorithm, or Cmodel/Hardware verification is a plus.
Perl/Python programming skill is a plus.
Strong background in computer architecture is a good plus.
Any experience on DL frameworks, such as TensorFlow/Caffee, is good plus.
Good written and spoken English.
Self motivated, team work, and good communication are a must.
GPU Compiler Engineer
Responsible for designing/implementing/maintaining the FE and BE of compiler for the Verisilicon (GP)GPU.
Analyze the compiler generated code, provide compiler optimization solution.
Working closely with hardware/architecture engineering and software teams to understand the hardware and software requirements. You'll influence the hardware architecture and software system design as part of your work on compiler.
Master or above degree in CS.
Work experience and rank are not limited.
Strong C/C++ programming skills and solid knowledge of data structure and algorithm.
Experience on compiler development for CPU or (GP)GPU , true development on optimizations of compiler will be a strong plus.
Familiarity with language spec of OpenGL, OpenCL and SPIR-V is a good plus.
Familiarity with CPU or (GP)GPU architecture is a good plus.
Self motivated, team work, and good communication are a must.
AI Compiler Engineer
To support AI acceleration of heterogeneous system, you'll be responsible for designing/implementing/maintaining the AI compiler for the Verisilicon PPU and VIP, including CPU.
Analyze the compiler generated code, provide compiler optimization solution.
Working closely with hardware/architecture engineering and software teams to understand the hardware and software requirements. You'll influence the hardware architecture and software system design as part of your work on compiler.
Master or above degree in CS.
Work experience and rank are not limited.
Strong C/C++ programming skills and solid knowledge of data structure and algorithm.
Excellent knowledge of linear algebric.
Familiar with AI computational graph and its operator.
Experience on compiler development, true development on optimizations of compiler will be a strong plus.
Familiarity with open-source AI compiler, such as XLA/TVM/GLOW, etc.
Self motivated, team work, and good communication are a must.
GPU Algorithm Engineer
GPU algorithm research and development, including specification, architecture, micro-architecture, analysis and development.
Work experience and rank are not limited.
Programming skills in C and C++.
Highly motivated and skillful at solving difficult technical problems.
Strong communication skills in both English and Chinese.
Knowledge of GPU fix function and general purpose computing.
Knowledge of OpenGL ES or OpenCL programming is a plus.
Experience in algorithm development in GPU, Video or AI processor.
Experience of CPU or GPU ISA is a plus.
Expert of Display Image/video Quality
The expert should be responsible for our company's Display image/video algorithm testing/certification, including current lossy compression project and our GPU graphics quality and Display Controller quality.
5+ years visual image/video quality working experiences.
Experience of hands-on image algorithm or video algorithm.
The computer vision master degree is required, phD degree is prefer.
Strong skill to generate essential visual test cases of our products.
Skill to generate the essential/corner cases to test our Compression/GPU/DC/VPU algorithm.
Skill to explore other open source image/video quality paper and algorithm.
Judge image/video quality, conduct visual quality test with group of people, and delivers algorithms to simulate the visual judge by computers.
Image Signal Processing Algorithm Engineer
Basic ISP pipeline, advanced image analysis algorithm and related image processing algorithm research and optimization.
ISP Algorithm C-Model design and implementation.
MS., PHD. in EE, CS or related IT technology fields.
Work experience and rank are not limited.
Skilled in algorithms of ISP modules and C/C++ programming, especially 3+ years experience in design of image processing algorithm.
Knowledgeable in ISP architecture, ASIC algorithm design and optimization.
Good Mandarin and English communication skills.
Self-motivated, good communication skills and team work spirit.
Software Program Manager
Lead the planning and implementation of project.
Facilitate the definition of project scope, goals and deliverables.
Plan and schedule project timelines, track project deliverables using appropriate tools.
Coordinate cross-function teams include ASIC, SW, HW etc.
Constantly monitor and report on progress of the project to all stakeholders, present reports -defining project progress, issues, risks and solutions.
Implement and manage project changes and interventions to achieve project outputs.
Produce Project evaluations and assessment of results.
Master’s Degree or equivalent with a minimum of 3 years’ experience or a Bachelor’s -Degree with a minimum of 5 years’ related experience.
Participated in the whole process of chip development ，understand of complete chip development lifecycle and entire design flow( wafer-processing/packaging/testing/QA/software/board/etc.).
Prefer to have IoT related SoC or MCU chip project management experience.
Qualification in project management or equivalent.
Knowledge of both theoretical and practical aspects of project management.
Knowledge of project management techniques and tools.
Experience working independently and as part of a team to solve difficult technical, quality, cost, and schedule challenges.
Good communication organization ability, initiative, sense of responsibility.
ASIC Program Manager
Manage and drive program decisions and schedules during pre-sale and post-sale stages.
Pivotal contact with development groups, sales/marketing teams and customers.
Provide central oversight over multiple aspects of multiple projects in terms of quality, timeline, cost, scope, resource allocation and communication.
Ownership of project assessment over technology, schedule and cost.
Manage cross-functional groups and customer to insure success of the project.
Ensure project specifications and schedule compliance.
BSEE is required (MSEE is preferred) with 5+ years experience as an ASIC/IC design leader/manager or project manager.
Leadership and problem-solving skills with strong presentation and communication skills.
Exposure to complete chip development lifecycle and entire design flow.
Understanding of chip deployment process (including packaging/testing/Software/board).
Track record of delivering projects on schedule is preferred.
Technical guidance skill set in various engineering field is preferred.
Solid interpersonal skill with fluent Mandarin and English.
Team player, motivated, organized and dedicated.
Package Simulation Engineer
Equivalent circuit model extraction for Package product (including R/L/C, S-parameter, IBIS).
SI/PI simulation and analysis for Package product (including Chip-Package-Board co-simulation for high speed serial link interface, high speed parallel bus interface, high power supply).
Work with package design team to optimize and signoff package design.
Bachelor or above in EE or Equivalent.
Work experience and rank are not limited.
Familiar with flow of package modeling and PI/SI analysis.
Familiar with at least 1 of simulation tools(Sigrity, Ansys, Hyperlinks, ADS, Hspice...).
Familiar with high speed interface(DDRn, PCIE, Serdes...).
Familiar with at least 1 of layout tools(Cadence, Mentor...), knowledge in package layout is preferred.
Good communication skill, fluent in both English and Chinese.
Package Layout Engineer
Package design feasibility study to provide the more competitive package solution; Co-work with R&D team to optimize and generate the Bump map and Ball map.
Responsible for completing package designs, design rule set up and drawing review with package house, co-work with simulation engineer to achieve best package performance, work with customer/assembly house for design issue timely closure.
Support both internal and external project on chip-package-PCB co-design tasks, including I/O planning, bump/ball assignment and package routing.
Support simulation engineer on electrical/thermal characterization.
Bachelor or above in Engineering or Equivalent.
Work experience and rank are not limited.
Familiar with substrate-based package, good understanding on assembly/substrate process.
Basic knowledge on high speed PI/SI design.
Experience on chip-package-PCB co-design will be a plus.
Good communication skill, fluent in both English and Chinese.
QRA Engineer
Co-work with product engineer to review wafer tape out, pilot run, qualification, drive the continuous improvement.
Plan the reliability qualification plan and execute.
Organize the review for production release, maintain the QPL list and product data base.
Support the vendor audit.
Handling the RMA and FA.
Structured and effective Problem Solving Methodology, including 8D/3x5WHY,drive the vendor to continue improve quality performance.
Bachelor degree or above in electronic and material science, major in semiconductor, EMS related.
At least 3 years quality management experience in IC design and manufacturing house, familiar with wafer fabrication, IC assembly and Testing process.
Familiar with quality management system including ISO9001/IATF16949, rich audit experience, can lead the audit along.
Good quality improvement principles and tools such as 8D,3x5why etc.
Good skill in reliability qualification, familiar with Jedec and AEC Q-100.
Team working, fluent English, good communication skills and strong organizing capability.
Planner of Production
Function mainly covers Planning, Production Control, Delivery, Internal Customer Service and others.
Planning:
Receive/Clarify field's or internal engineering department's request on detailed Subcon Service to be performed.
Co-Work with Operation/Technical Support team to find suitable vendors to meet field's or internal engineering department's request.
Plan smooth turnkey flow & schedule for each project. Try to meet internal/outside customers' demand.
Find appropriate capacity at vendors.
Book adequate allocation at vendors.
Place order/work order to vendors.
ProductionControl:
Maintain good relationship with vendors.
Secure reasonable delivery schedule from vendors, once order accepted by vendor.
Closely monitor WIP. Push to pull in the schedule if needed.
Highlight any failure / excursion to field/engineering/Operation (technical support team). Closely monitor and drive above teams together with vendor to solve failure/excursion.
Operate SAP ERP system; correctly maintain WIP status in ERP system.
Delivery:
Find qualified delivery company to meet project requirement.
Prepare/Watch out delivery from vendor to vendor, vendor to customer.
Support custom clearance if needed.
Issue shipping documents for each delivery.
Qualify/Manage warehouse for some inventory keeping.
Internal customer service:
Keep timely communication with field/internal engineering department for the turnkey status and schedule.
Others:
Support field/internal engineering team for cost estimation (delivery/logistics charge), schedule estimation.
Support Finance team at payment (to vendor), Invoice (to customer), etc.
Have relevant working experience in Production Material Control (PMC), Production Planning (PP) or Workshop Supervisor (MFG),work experience and rank are not limited.
Experience in IC industry is preferred.
IE (Industrial Engineering) or BA (Business Administration) background is preferred.
Foundry Interface Engineer
Interface with external foundry and internal design/Operation/PMO/Sales groups.
Study design manual of different foundry & tech node, based on device list and GDS list to calculate mask quantity, provide exact information to purchase team for quotation reference.
Handle tape out activities without delay and mistake, do job view, define corner split, trace and pull in lot schedule, review WAT, keep NTO succeed.
Support internal Design/ Sales/Purchase team to do new Fab and new process survey for pre sales cases. Attend foundry symposium, and collect newest tech node progress.
Working with external foundry and internal engineer team to resolve wafer manufacturing technical issue, during new tape out stage, risk run stage and mass production stage, keep doing yield improvement, handle Foundry inline excursion, PCN, RMA etc.
Apply PDK/Library/ Foundry IP/tech files per project needs, manage multi foundry accounts.
Hold periodic meeting with foundry for technical topics. Arrange QBR/QTR.
Support internal QA team solve foundry related quality problems, attend foundry audit.
Degree of Bachelor or above in engineering field, major in EE is preferred,work experience and rank are not limited.
Experience in foundry PIE/ Product/ R&D/ Device is preferred,the tape out experience is a plus.
Strong background in wafer process technology, be familiar with FinFET experience is highly preferred.
Be able to do yield, inline, WAT data analysis with EDA tooling.
Have strong communication and interpersonal skills in English.
Sales/Application Engineer
Provide front-line support for the professional SoC design service in terms of frontend, backend, manufacture, as well as packaging and testing.
Evaluate the feasibility of IPs (digital and mixed-signal included) on target project and develop the specific application based on the customized requirements.
Deliver technical promotion and training to customers based on the skillful understandings to the main IPs, including VPU, NPU, ISP, GPU, CPU, DSP, etc.
Assist with sales partner to estimate the trend of market and orientate & explore the high-quality potential customers.
Collaborate with relevant internal teams (Engineering, Operation, Finance, etc.) to streamline the proceeding process and resolve emerging issues in the timely manners.
Masters Degree in Electronics Engineering or Communications Engineering (Bachelors Degree considered if supported by 10+ years experience).
5+ years experience of RTL and ASIC/SoC design and be equip with good knowledge of frontend or backend design.
Post-graduate experience of communications or consumer chip system development based on MCU/DSP is preferred.
Experience for CPU, GPU, VPU, NPU, ISP IP development or IP based application development is preferred.
Experience of embedded software development not essential but a definite advantage.
Experience in a customer-facing role preferred.
Good verbal and written communication in English and Mandarin essential.
SerDes FAE
Build and develop relationships with customers, manage customer expectations to optimize customer satisfaction.
Follow up customers' questions on SerDes IP.
Track and update JIRA support tracking management system to meet SLA.
Verilog model integration and simulation.
GDS physical integration and floorplan design.
DFT integration.
Timing closure.
SerDes EVB testing.
Firmware integration.
Post-Silicon bring up.
Post-Silicon validation.
Analyze and identify characteristics of requirements.
Bachelor degree or above majored in Electrical Engineering/Computer Science/ Communication Engineering and related.
At least 5 years experience from SerDes product FAE or PM of semiconductor company; chip design experience is preferred.
Familiar with SerDes or IC design/verification/manufacturing flow, familiar with software and hardware of SerDes or chip application.
Deeply understanding on high-speed IO of advanced process (16nm/7nm/5nm)、 high-speed SerDes(28G/56G/112G)、PCI Express, or deeply understanding on advanced process IP/chip design and advanced package technology.
Deep understanding or relevant experience on SerDes application and its technology supply chain、IP partners and customers are preferred.
Excellent communication, organization and coordination ability, good project management ability and self-driving ability.
Technical Writer
Develop in-depth understanding on digital IP products and their applications to capture product information into simple, accurate, and polished documents, covering the fields of computer graphics, video processing, imaging, artificial intelligence, and computer vision.
Collaborate with R&D developers and product engineers to capture requirements, define and develop new formal technical documentation.
Edit existing developer-written spec in preparation for formal document publication.
Maintain and update technical documentation database, including contents for hardware, software, and tools/SDK.
Analyze current documentation content, communicate and obtain feedback from others, and make improvement as necessary.
Edit and format technical documents to make them elegant and easy to read.
Review or translate marketing materials such as CEO speech words, newsletter, product brief, company or department introduction, and other publicity documents for marketing purpose.
Work experience and rank are not limited.
Strong written and verbal communication skills and experience working with cross functional teams.
Background in engineering or computer science is a big plus.
Excellent attention to detail and the ability to prioritize and work on multiple projects in fast-paced and changing environment.
Proactive, self-motivated, and open-minded attitude.
Marcom Specialist
Develop marketing materials and translate accordingly.
Assist in the planning and execution of marketing activities.
Assist in market analysis, including online/offline research, information collection, sorting and filing, etc.
Support implementation of other operation projects, such as daily publicity, cross-department support and cooperation, etc.
Bachelor’s degree or above, preferably in English.
Good writing skills and excellent verbal and written communication skills, in both Chinese and English.
Good Microsoft Office skills, including PowerPoint, Excel, Word, etc.
Outgoing, detail-oriented and proactive with ability to learn quickly.
Good understanding of the chip industry. Technical background or industry analyst working experience is preferred.
Foundry Purchasing
Manage foundry purchasing matters to meet worldwide requirement.
Establish, build, and maintain partnership with all key foundries.
Responsible for pricing, contracts, and payment terms with foundries.
Work with Planning, PE, Quality and foundry technical department to get capacity support and improve delivery and quality.
Work with Sales/FAE and PE to ensure pre-sales activity.
Purchasing documents handling including PR/PO/GR/Invoice.
Possess a Bachelor’s Degree in Engineering, Supply Chain Management or related fields.Master’s Degree in Engineering or Business, preferred.
Have assembly and testing experience is preferred,work experience and rank are not limited.
Have a good understanding of supply chain and IC manufacturing processes.
Have a team and project management experience is preferred.
Strong oral speaking and written communication skills in English.
Buyer（OSAT Accessory Procurement）
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Be responsible for the OSAT accessory purchasing, such as probe card, load-board, socket, change-kits, etc.
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Develop potential suppliers to meet project’s requirement.
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Work with ENG team closely and engage in the project at the early stage, choose the suitable supplier.
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Maintain the relationship of the existing suppliers and do their performance evaluation periodically.
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Purchasing documents handling including PR/PO/GR/Invoice
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Purchasing contract management.
Bachelor’s Degree in Engineering, Supply Chain Management or related fields, semiconductor related background is preferred.
Work experience and rank are not limited.
Experience in semiconductor related company is a plus. Have assembly and testing experience is preferred.
Have a good communication skill and strong teamwork ability.
Internal Auditor
Perform internal audit across the group, ensure appropriate internal controls are in place in the group.
Ensure the implementation of corporate policies and procedures are in compliance with statutory requirements.
Lead the optimization of internal process and controls. Update control policies documents.
Cooperate with external auditor in control test and walkthrough in annual audit or other external audit.
Supporting in the preparation of Audit Committee papers and other reports as required.
Other jobs management assigned.
Bachelor degree or above.
3 to 4 year+ working experience in Big 4, additional internal audit experience is preferred.
CPA or ACCA qualified.
Strong interpersonal, communication and report writing skills.
Fluent written and spoken English and Mandarin.
Good at Microsoft Office software.
Self-motivated, enthusiastic and energetic.
Recruiting Specialist
Post and refresh jobs, and manage recruitment channels.
Direct sourcing for suitable candidates and screen resumes from all channels; Interview and relevant process communication.
Maintain and update recruitment related documents, and collect recruitment data on a regular basis.
Assist line manager and department to carry out recruitment-related activities, such as annual university recruitment, competitions and other relevant work.
Complete other work assigned by line manager.
Bachelor’s degree or above, overseas education background is preferred; major in related field or related experience is preferred.
1-3 years related recruiting experience.
Proficient in English writing and listening, and passed CET-6.
Positive, self-motivated and result-oriented.
Admin
Be responsible for daily administrative affairs of the company.
Be responsible for receiving, sending and registering the company letter and express delivery.
Be responsible for the drafting, review, delivery, urging and inspection of official documents, as well as the filing of documents and files.
Be responsible for the front desk reception and entertaining guests.
Be responsible for the management of office facilities.
Assist the department manager in organizing and arranging various cultural and sports activities and tourism activities to enrich staff’s cultural life.
Bachelor degree or above.
Good mental look and p positive work attitude.
Good communication skills, CET6 or above.
Fresh graduates are welcome to apply and have the opportunity to stay, overseas study background is preferred.
IT Helpdesk
Provide day-to-day technical support for desktop, laptop, Mac, IP Phone, mobile devices, network devices, telephone, printers, projectors, etc.
Deploy, support operating systems and client software, including Windows, OS, Linux, Microsoft Office, Autodesk, Adobe Photoshop, Visual Studio, Development software, etc.
Provide basic support for VMWare, ESXi, Windows server, storage, and network device etc.
IT asset Management.
Familiar ITIL support model, check cases in Helpdesk queue, and resolve in SLA
PC hardware troubleshooting, replace basic component.
Vendor management, IT device order and payment management etc.
Collect and draft IT relevant guide and document.
Education to degree Level preferably in Computer Science relevance.
Good English skill is preferred.
Work experience and rank are not limited.
Have passion and responsibility on work.
Familiar with AD, Windows, MS Office (outlook, Excel, Word, PowerPoint).
Basic knowledge for network device.
Excellent learning capabilities and team work spirit.
CCNA/MCSE/RHCE is preferred.
Unix/Linux System Administrator
Responsible for installation, upgrade, maintenance and troubleshooting of Unix/Linux Server issue.
Responsible for monitoring server health status.
Responsible for FTP project data transmission.
Participate in IT infrastructure related project planning and implementation.
Bachelor of Computer science or related subjects, work experience and rank are not limited.
Good experience with Unix/Linux systems (Red, Hat, CentOS, Ubuntu, OpenSUSE, Solaris), with troubleshooting capability.
Good experience with network.
Good skill on Unix/Linux scripts.
Good experience with VMware, understanding of vCenter, HA, etc.
Good communication skills and team work.
RHCE preferred.
Sales/Application Engineer
Provide front-line support for the professional SoC design service in terms of frontend, backend, manufacture, as well as packaging and testing.
Evaluate the feasibility of IPs (digital and mixed-signal included) on target project and develop the specific application based on the customized requirements.
Deliver technical promotion and training to customers based on the skillful understandings to the main IPs, including VPU, NPU, ISP, GPU, CPU, DSP, etc.
Assist with sales partner to estimate the trend of market and orientate & explore the high-quality potential customers.
Collaborate with relevant internal teams (Engineering, Operation, Finance, etc.) to streamline the proceeding process and resolve emerging issues in the timely manners.
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Masters Degree in Electronics Engineering or Communications Engineering (Bachelors Degree considered if supported by 10+ years experience).
5+ years experience of RTL and ASIC/SoC design and be equip with good knowledge of frontend or backend design.
Post-graduate experience of communications or consumer chip system development based on MCU/DSP is preferred.
Experience for CPU, GPU, VPU, NPU, ISP IP development or IP based application development is preferred.
Experience of embedded software development not essential but a definite advantage.
Experience in a customer-facing role preferred.
Good verbal and written communication in English and Mandarin essential.
SerDes FAE
Build and develop relationships with customers, manage customer expectations to optimize customer satisfaction.
Follow up customers' questions on SerDes IP.
Track and update JIRA support tracking management system to meet SLA.
Verilog model integration and simulation.
GDS physical integration and floorplan design.
DFT integration.
Timing closure.
SerDes EVB testing.
Firmware integration.
Post-Silicon bring up.
Post-Silicon validation.
Analyze and identify characteristics of requirements.
Bachelor degree or above majored in Electrical Engineering/Computer Science/ Communication Engineering and related.
At least 5 years experience from SerDes product FAE or PM of semiconductor company; chip design experience is preferred.
Familiar with SerDes or IC design/verification/manufacturing flow, familiar with software and hardware of SerDes or chip application.
Deeply understanding on high-speed IO of advanced process (16nm/7nm/5nm)、 high-speed SerDes(28G/56G/112G)、PCI Express, or deeply understanding on advanced process IP/chip design and advanced package technology.
Deep understanding or relevant experience on SerDes application and its technology supply chain、IP partners and customers are preferred.
Excellent communication, organization and coordination ability, good project management ability and self-driving ability.
ASIC Design Engineer (SoC)
Independently work on the design of ASIC functional blocks in terms of requirement analysis, architecture definition, block design, RTL coding, logic synthesis, andtiming analysis (STA).
Perform logic synthesis and timing analysis of chips and sub blocks, as well as DFT RTL coding, scan chain/MBIST/boundary scan circuits insertion, and test pattern generation and simulation.
Work closely with system engineers, physical implementation designers, and testing engineers to complete functional verification, flo orplan design, timing optimization/closure, and DFT ATE testing.
Master's or above degree in EE/CS related majors, working experience is unlimited.
Familiar with RTL coding/UVM (Verilog/System Verilog).
Familiar with the ASIC design flow, including specification, architecture definition, RTL coding, verification，and synthesis.
Adept at EDA tools (Synopsys or Cadence), such as VCS, Xcelium, DC, and PT.
Familiar with C/C++, Perl, Python, or other programming language.
Knowledge of processor design (ARM or RISC-V) and SOC on-chip bus protocols(AMBA/NOC) is a plus.
Knowledge of audio and video interfaces such as MIPI/HDMI/DP/SPDIF/I2S is a plus.
Knowledge of interfaces such as USB/PCIe/Ethernet/DDR/SD/eMMC/SPI/CAN is a plus.
Knowledge of processor (GPU/CPU) or computer architecture, AI, ISP, or video processing is a plus.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
SoC Design Verification Engineer
Independently work on the verification of ASIC functional blocks in terms of verification plan, test bench building up, test case development, simulation, and debugging.
Setup environment for IP and chip level verification, including behavior modeling.
Responsible for RTL/gate level simulation, code coverage and functional coverage analysis.
Master's or above degree in EE/CS related majors, working experience is unlimited.
Familiar with UVM Verification.
Adept at EDA tools (VCS/NC).
Familiar with C/C++, Perl, Python, or other programming language.
Knowledge of processor design (ARM or RISC-V) and SOC on-chip bus protocols(AMBA/NOC) is a plus.
Knowledge of audio and video interfaces such as MIPI/HDMI/DP/SPDIF/I2S is a plus.
Knowledge of interfaces such as USB/PCIe/Ethernet/DDR/SD/eMMC/SPI/CAN is a plus.
Knowledge of processor (GPU/CPU) or computer architecture, AI, ISP, or video processing is a plus.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
SoC FE Flow Engineer
Contribute and work on the chip and sub-blocks in terms of synthesize, timing optimization and sign-off.
Contribute and work on the chip and sub-blocks in terms of Design PPA.
Contribute and work on the chip and sub-blocks in terms of SDC writing change and hand-off.
Contribute and work on the chip and sub-blocks in terms of DFT coverage analysis.
Design test logic, insert Scan chain, MBIST, Boundary Scan circuits, finish DFT patterns generation and simulation.
Work closely with physical implementation engineers, to solve floorplan, timing analysis, optimization / closure.
Master's or above degree in EE/CS related majors, working experience is unlimited.
Programming skills in Verilog HDL and System Verilog.
Familiar with EDA tool, Such as Synopsys VCS 、 Verdi, Cadence IUS, Mentor QuestaSim etc.
Knowledge of SoC design techniques is a plus.
Knowledge of physical implementation techniques is a plus.
Knowledge of low-power design or DFT design techniques is a plus.
Familiar with DDR, PCIe, USB, MIPI, etc.
Familiar with high-speed interface techniques is a plus.
Knowledge of FPGA timing constraints and timing closure background is a plus.
Familiar with linux OS, programming skills in Shell/Perl/Python/TCL scripts is a plus.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
Design Implementation Engineer
Implement the RTL to GDS design flow.
Complete the chip/complex block timing constraint, logic synthesis, STA, test logic circuit design.
Complete the chip/complex block P&R, power analysis, physical verification, low power check, ESD check.
Develop/maintain the physical design implementation related flow.
Provide technical support for customer/FAE/FEE/sales.
Master's or above degree in EE/CS related majors, 1-3 years working experience.
Familiar with the main physical design EDA tools.
Strong scripting abilities in TCL/PERL.
Single or multiple experiences on design implementation from RTL to GDS, chip level testing, ASIC coding and simulation, ASIC physical layout, IC manufacture and process.
Ability to help and lead Junior Engineer to solve problem.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
ASIC Design Engineer (IP)
Independently work on the design of ASIC functional blocks in terms of requirement analysis, architecture definition, block design, RTL coding, logic synthesis, and timing analysis (STA).
Contribute and work on in Graphics Processor(GPU), Video Processo（r VPU）, Display Processor(DPU), DSP Processor(ZSP), Image Signal Processor(ISP) and Neural Network Processor(NPU)Project.
Master's or above degree in EE/CS related majors, working experience is unlimited.
Familiar with ASIC design process, including specification, micro-architecture, and RTL implementation.
Programming skills in Verilog HDL or VHDL.
Knowledge of processor, computer architecture, computer graphics, low power design，AI, ISP and video processing is preferred.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
ASIC Verification Engineer (IP)
Independently work on the verification of ASIC functional blocks in terms of verification plan, test bench building up, test case development, implementation, debugging, coverage collection and analysis
Contribute and work on Graphics Processor(GPU), Video Processor(VPU), Display Processor(DPU), DSP Processor(ZSP), Image Signal Processor(ISP) and Neural Network Processor(NPU).
Master's or above degree in EE/CS related majors, working experience is unlimited.
Familiar with verification language (System Verilog) and ASIC verification flow.
Familiar with at least one scripting language: Perl, Perl, Shell, Tcl, Makefile ...
Knowledge of processor, computer architecture, computer graphics, low power design，AI, ISP and video Processing is preferred.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
RFIC Design Engineer
Design RF front-end and ABB circuits based on CMOS/FDSOI technology for wireless IC chips.
Guide and/or supervise layout designers for high-quality layout.
Assist in test board design, debug and verify test chips, and iterate design based on the test results to optimize the function and performance.
Master's or PHD degree in EE or Micro-Electronics.
Solid course knowledge and project experience in related areas.
Experience in design of the following circuits is preferred: PA, LNA, MIXER, PLL, VCO, Filter, VGA/PGA, AD/DA, Low Power PMU, XO, etc.
Capability to operate test instruments, including oscilloscope, spectrum analyzer, signal generator, etc.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
Analog Circuit Design Engineer
Design and develop deep sub-micron CMOS analog integrated circuits.
Guide and/or supervise layout design.
Assist in test board design so as to debug and verify test chips.
Write technical documents.
Master's or above degree in Micro-Electronics, EE, or related majors.
Course knowledge and project experience in analog integrated circuit design.
Basic knowledge and skills of Linux and EDA tools.
Experience on one or more of the following disciplines: Bandgap, LDO, DC-DC; VCO, PLL, DLL, PCIE, USB; ADC, DAC, etc.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
Layout Design Engineer
Design Analog/MS/RF/Foundation IP layout in various advanced CMOS processes.
Conduct physical verification and parasitic extraction.
Generate IP tape-out kits.
Bachelor's or above degree in EE, device physics, or related majors.
Familiarity with Unix/Linux OS, and experience on Synopsys/Cadence/Mentor EDA.
Excellent learning ability.
Candidates who meet at least one of the following conditions are preferred:
Good at Perl, Tcl, Shell, or other scripting languages.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
SoC Software Engineer
Understand system requirement and provide design solution.
Provide robust, flexible and reusable software SDK for multiple platforms, include coding, document and unit test case.
Integrate with software SDK with customer system.
Troubleshoot system issues and provide bug fixing.
Keep improving system performance.
Master's or above degree in CE/CS related majors, working experience is unlimited.
Familiar and expert on at least one language: Java, python, C/C++ ...
Experience on embedded processor architecture development such as X86, ARM, DSP, RISC-V, etc.
Familiar with PCIe, Video Codec, ISP, Camera, GPU driver.
Understand virtualization, QEMU + KVM.
Familiar with BT/BLE, WiFi, NB-IoT, LTE-CAT1 and other wireless protocols.
Familiar with Linux/Andorid/Windows, and Android productization/Windows driver development experience is preferred.
Familiar with Caffe, TensorFlow, Pytorch and other machine learning frameworks and have algorithm training foundation.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
Windows driver Engineer
Develop and maintain Windows kernel driver;
Responsible for software platform related debugging, performance optimization, configuration and bug correction;
Prepare relevant technical documents according to R&D specifications and project process.
Master's or above degree, major in CS, working experience is unlimited.
Proficient in C/C++, familiar with the operating mechanism of Windows system, and Windows kernel programming.
Proficient in Windows driver development, WDK and related driver programming, experience and ability to independently complete driver development.
Familiar with UEFI/BIOS, ACPI.
Familiar driver debugging technology and common kernel debugging tools, ability to troubleshoot and solve problems.
Strong sense of responsibility and good teamwork spirit.
Good English writing and communication skills.
Willing to accommodate the work content, according to the company's projects and plans requirement, continue to learn and broaden the knowledge field, and be willing to accept challenging tasks.
Graphic Driver Software Engineer
Understand chip graphic specification and provide driver design.
Provide robust, flexible and reusable graphic device driver, include coding, document and unit test case.
Troubleshoot system issues and provide bug fixing.
Keep improving system performance.
Master's or above degree, major in CS, working experience is unlimited.
Strong C/C++ programming.
Familiar with Linux device driver development.
Good knowledge of computer graphic.
Strong troubleshooting and debug ability.
Good communication and cooperation with team.
Experience of DRM, OpenGLES, Vulkan or MS DirectX is preferred.
Knowledge of GIT is preferred.
Digital Baseband Design Engineer
IoT wireless baseband system design and implementation.
Physical layer signal processing module design, implementation, and optimization. For example, physical layer control, physical algorithm implementation in software and hardware, etc.
System integration, debugging, verification, and wireless system (including RF) testing. Collaborate with the RF team for wireless system integration, functional testing, and performance verification.
Technical support for field integration and testing. Support customers to use the solution.
Master's or above degree in EE, communications engineering, or related majors. working experience is unlimited.
Deep understanding of wireless systems, physical layer algorithms, and physical layer signal processing flow.
Experience in DSP programming or FPGA RTL implementation.
Knowledge on wireless communications standards, such as Cellular 3GPP, Wi-Fi, Bluetooth, and Lora/ZigBee.
Good teamwork skills and willing to learn.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
IP Software Engineer
Develop and optimize drivers for IP processors, such as Graphics Processor(GPU), Video Processor(VPU), Display Processor(DPU), DSP Proc essor(ZSP), Image Signal Processor(ISP)and Neural Network Processor(NPU) etc.
Design and develop key software frameworks for IP systems, such as AI, security, and multi-media frameworks etc.
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Master's or above degree in EE/CS related majors, working experience is unlimited.
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Good C/C++ programming skills, familiar with C, Linux driver development.
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A good understanding of operating systems and data structure/algorithm.
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Good problem solving and documentation skills.
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Excellent quick learning ability.
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Candidates meeting one or more of the following criteria are preferred:
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Engaged in the development of IP drivers such as GPU/WIFI;
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Understand ISP/Camera Sensor, and have practical project development experience;
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Engaged in Linux, kms/gem framework driver development;
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Knowledge of deep learning algorithm optimization, GPGPU parallel programming is preferred;
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Understand audio/video coding standards and algorithms, experience on audio/video coding and decoding system development, multimedia framework development;
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Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
GPU Algorithm/Architecture Engineer
Research on high-performance GPU algorithms and develop the corresponding models to validate functions and performance.
Co-work with both hardware and driver teams to design and validate GPUs.
Quantitatively analyze the performance of GPU IP and optimize the architecture
Master's or above degree in EE/CS related majors, working experience is unlimited.
Strong programming skills in C/C++.
Working knowledge of scripting programming.
Experience in computer architecture, computer graphics, System C, or Verilog is a plus.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
GPU Compiler Engineer
Design, develop, and maintain GPU front-end and back-end compilers.
Analyze the compiler-generated codes and provide solutions to optimizing compilers.
Work closely with hardware/architecture engineering and software teams to clarify hardware and software requirements. Participate in hardware and software design from the complier's perspective.
Master's or above degree in EE/CS related majors, working experience is unlimited.
Strong C/C++ programming skill and solid knowledge of data structure and algorithm. Experience in compiler development is a plus.
Familiarity with CPU or GPU architecture is a plus.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
Algorithm Engineer
GPU/DPU/ISP/VPU/DSP related algorithms research, and design algorithms and models for related processors.
Cooperate with hardware and driver team to complete the design and verification of related processors.
Participate in the completion of the C Model of the algorithm module and provide the required test cases.
Quantitatively analyze GPU/DPU/ISP/VPU/ZSP performance and optimize architecture design.
GPU/DPU/ISP/VPU/DSP related algorithms research, and design algorithms and models for related processors.
Cooperate with hardware and driver team to complete the design and verification of related processors.
Participate in the completion of the C Model of the algorithm module and provide the required test cases.
Quantitatively analyze GPU/DPU/ISP/VPU/ZSP performance and optimize architecture design.
Master's or above degree in EE/CS related majors, working experience is unlimited.
Familiar with C/C++, Matlab and other programming languages.
1 year or above working experience in GPU/DPU/ISP related algorithms, preferably with one or more of the following experience:
Familiar with basic ISP channels, C/C++/Matlab/Python programming, understand the subjective and objective evaluation of image quality, more than 1 year experience in ISP module development or image effect debugging experience;
Research on DSP-based image/video related algorithm development and optimization, with more than 1 years of experience in CV-related project development such as opencv/openvx/vslam;
According to HEVC/H264/AV1 and other mainstream video codec protocols, develop and optimize video encoder/decoder related to algorithm, with more than 1 year experience in video codec related project development;
Full of professionalism and teamwork spirit, good command of listening, speaking, reading and writing in both Chinese and English.
Program Manager for Functional Safety Projects
Working with current FuSa team to setup Project Management structure and Project Plans for Functional Safety Projects.
Engaging with FuSa Consultant and Assessment teams to monitor project execution and make sure requirements, deliverables and schedule are being met.
Work with cross-functional teams in our division to address the FuSa requirements, issues or questions and provide resolution.
Coordinate regular review meetings among the internal teams as external consultants/auditors to track status and monitor progress.
Prepare status and progress reports on regular basis to check against each milestone in project plan.
Identify issues for continuous improvement throughout the whole project life cycle and performing Lessons Learnt process before project closing.
Proven experience in high-tech industry related program management
Excellent organizational and communication skills
Having ability and will to work positively across the Functional Safety, Engineering teams and management.
Strong understanding of project and program management methodologies and techniques
Good knowledge of scheduling and resource allocation procedures
Understanding of IP HW & SW design process and life cycle is a plus.
Understanding of Functional Safety project life cycle is a plus.
IT Helpdesk
Provide day-to-day technical support for desktop, laptop, Mac, IP Phone, mobile devices, network devices, telephone, printers, projectors, etc.
Deploy, support operating systems and client software, including Windows, OS, Linux, Microsoft Office, Autodesk, Adobe Photoshop, Visual Studio, Development software, etc.
Provide basic support for VMWare, ESXi, Windows server, storage, and network device etc.
IT asset Management.
Familiar ITIL support model, check cases in Helpdesk queue, and resolve in SLA
PC hardware troubleshooting, replace basic component.
Vendor management, IT device order and payment management etc.
Collect and draft IT relevant guide and document.
Education to degree Level preferably in Computer Science relevance.
Good English skill is preferred.
Work experience and rank are not limited.
Have passion and responsibility on work.
Familiar with AD, Windows, MS Office (outlook, Excel, Word, PowerPoint).
Basic knowledge for network device.
Excellent learning capabilities and team work spirit.
CCNA/MCSE/RHCE is preferred.
Sales/Application Engineer
Provide front-line support for the professional SoC design service in terms of frontend, backend, manufacture, as well as packaging and testing.
Evaluate the feasibility of IPs (digital and mixed-signal included) on target project and develop the specific application based on the customized requirements.
Deliver technical promotion and training to customers based on the skillful understandings to the main IPs, including VPU, NPU, ISP, GPU, CPU, DSP, etc.
Assist with sales partner to estimate the trend of market and orientate & explore the high-quality potential customers.
Collaborate with relevant internal teams (Engineering, Operation, Finance, etc.) to streamline the proceeding process and resolve emerging issues in the timely manners.
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Masters Degree in Electronics Engineering or Communications Engineering (Bachelors Degree considered if supported by 10+ years experience).
5+ years experience of RTL and ASIC/SoC design and be equip with good knowledge of frontend or backend design.
Post-graduate experience of communications or consumer chip system development based on MCU/DSP is preferred.
Experience for CPU, GPU, VPU, NPU, ISP IP development or IP based application development is preferred.
Experience of embedded software development not essential but a definite advantage.
Experience in a customer-facing role preferred.
Good verbal and written communication in English and Mandarin essential.
SerDes FAE
Build and develop relationships with customers, manage customer expectations to optimize customer satisfaction.
Follow up customers' questions on SerDes IP.
Track and update JIRA support tracking management system to meet SLA.
Verilog model integration and simulation.
GDS physical integration and floorplan design.
DFT integration.
Timing closure.
SerDes EVB testing.
Firmware integration.
Post-Silicon bring up.
Post-Silicon validation.
Analyze and identify characteristics of requirements.
Bachelor degree or above majored in Electrical Engineering/Computer Science/ Communication Engineering and related.
At least 5 years experience from SerDes product FAE or PM of semiconductor company; chip design experience is preferred.
Familiar with SerDes or IC design/verification/manufacturing flow, familiar with software and hardware of SerDes or chip application.
Deeply understanding on high-speed IO of advanced process (16nm/7nm/5nm)、 high-speed SerDes(28G/56G/112G)、PCI Express, or deeply understanding on advanced process IP/chip design and advanced package technology.
Deep understanding or relevant experience on SerDes application and its technology supply chain、IP partners and customers are preferred.
Excellent communication, organization and coordination ability, good project management ability and self-driving ability.
SoC Software Engineer
You will be in a position responsible for one or more of the following assignments:
Develop SDKs including device drivers, middleware, and reference applications for designed chips.
Provide SoC-level or board-level software solutions to facilitate customers’ secondary software development and mass production based on SDKs.
Involved technical domains include computer vision, graphics, security, image processing, BT/WiFi, sensor, automatic drive, and artificial intelligence.
Develop device drivers and software based on Android/Linux/Chromium /Windows/ FreeRTOS, etc. Conduct automation testing.
Candidates meeting two or more of the following criteria are preferred:
Bachelor's or above degree in majors such as computer science, communication engineering, information technologies, electronic engineering,work experience and rank are not limited.
Familiar with at least one programming language (such as Java, Python, and C/C++). C/C++ or assembly language is preferred.
Experienced with programming for at least one embedded processor architecture, such as ARM, DSP, and RISC-V.
Familiar with machine learning frameworks such as Caffe, TensorFlow, and PyTorch, and other popular algorithms.
Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
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