Samsung Complements the Production of its Revolutionary 7nm EUV with Exceptional SAFE™ Ecosystem Solutions
San Jose, CA, USA - Oct 17, 2018 – Samsung Electronics Co., Ltd., a world leader in advanced semiconductor technology, today announced the launch of its new commercial 7LPP, the 7-nanometer (nm) LPP (Low Power Plus) with extreme ultraviolet (EUV) lithography technology for an wafer production.
In conjunction with key Samsung Advanced Foundry Ecosystem (SAFETM) partners, customers can now rely on a comprehensive set of design collaterals to embark on Samsung’s revolutionary new process node technology. Specifically, SAFETM partners – Ansys, Arm, Cadence, Mentor, SEMCO, Synopsys and VeriSilicon – have enabled critical Process Design Kit (PDK), IP, Reference Flows, Advanced Packaging Solutions and Design Services for customers to leverage the production-ready 7LPP process to quickly and efficiently bring their next-generation chips to market.
“In collaboration with these ecosystem partners, we have established the necessary design enablement collateral to facilitate customer design starts on our differentiated 7LPP process,” said Jaehong Park, senior vice president of Foundry Design Service Team at Samsung Electronics. “The advanced design ecosystem solutions jointly developed by these partners further enhance the customers’ user experience.”
Foundation and Advanced IP
SAFETM partners from across the industry will be providing a broad range of silicon verified IP to fully enable our customers to develop their products quickly and reliably on this new platform. From high-performance and high-density embedded memories and logic libraries to the most advanced interface IP solutions including HBM2/2E, GDDR6, DDR5, USB 3.1, PCI Express 5.0 and 112G SerDes, SAFETM is ready to help customers implement their designs on 7LPP EUV with significantly less risk. Early design kits (DK) are now available for customer design starts.
Design Tools & Flows
SAFETM is also fully prepared for our customers to begin their designs today using fully certified PDK tools and reference flows from our partners at ANSYS, Cadence, Mentor, and Synopsys. These partner tools and flows have been fully qualified on the new 7LPP EUV process technology and are ready to enable our customers today.
As customer designs become ever more complicated, advanced packaging plays a larger role in the design ecosystem. The SAFETM is ready to complement the most complex customer designs on 7LPP EUV with a full range of advanced packaging solutions including 2.5D silicon interposer and new innovations like Embedded Passive Substrates.
For 7LPP EUV, the SAFETM ecosystem is also fully enabled with a complete range of design services from partners like Verisilicon. These partners are thoroughly qualified on the 7LPP EUV platform and are ready to implement customer designs today.
“Being one of the earlier adopters of 10LPP with volume production, VeriSilicon taped out a chip on 7LPP EUV and saw significant advantages in both performance and power consumption over 10LPP, and are ready to provide design service for our customers. As a Silicon Platform Service (SiPaaS®) company, VeriSilicon has taped out one chip a week based on our Vivante GPU, vision image processor, Hantro video and ZSP-based audio/voice SoC platforms for AIoT at the device, on the edge, and in the cloud by mainly using Samsung FinFET and FD-SOI technologies among others.”
- Wayne Dai, President and CEORead More.