HDMI TX PHY is the physical layer of a single-link HDMI transmitter interface. The HDMI TX PHY comprises three data lanes and one clock lane to perform the serialization and transmission of video/audio data and control information. The PHY can support maximum data rates of 6 Gbps/lane to satisfy HDMI 2.0 protocol. The PHY supports input data transfers of 30, 60, or 120 bits.

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