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Baseband Processing

Baseband Processing
From 2G to 3G cellular and beyond

The baseband processor in a mobile handset IC includes modem processing and often voice processing. The ZSP architecture was designed with multiple features such as multiple ALU and MAC per-cycle, single-cycle Viterbi instruction, native complex arithmetic functions and the Z.Turbo™ accelerator. The mid-range ZSP400 can handle both 2G and 2.5G modem and voice processing with a single core, as opposed to having to employ two cores or hardwired logic using other DSP architectures in the same class. ZSP500 and beyond can perform 3G baseband processing such as in WCDMA, CDMA-EVDV and TD-SCDMA. The Z.Turbo™ accelerator enables power-efficient performance boost for special functions such as Turbo coding, Viterbi and Cholesky. Many wireless industry leaders, including Datang, UTStarcom, Huawei, Skyworks, and VIA Telecom have licensed the ZSP processor for mobile and cellular applications.


                               

Features


Benefits

 Software-compatible DSP cores from ZSP200 to
    ZSP600 addressing all 2G-3G baseband

    requirements without having to switch 
   
architecture
 Industry's best code density - EEMBC certified
 User-customizable Z.Turbo™ technology for
    algorithm-specific acceleration
 Off-the-shelf voice codecs such as GSM-AMR, EFR,
    FR, HR
 3rd-party support for Layer 1, 2, 3 software
 Amba AHB support for ease-of-integration with 
    microcontrollers
 Unified ZSP+ARM RTOS and development tools
    support

 Power-efficient baseband core
 Cost-efficient designs with compact instruction set
 Software-compatible and scalable architecture 
    saves time-to-market and R&D cost
 Customers can add their own market
    differentiation with Z.Turbo™
 
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